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? semiconductor components industries, llc, 2001 june, 2001 rev. 0 1 publication order number: ncv8508/d ncv8508 series advance information low dropout linear regulators with watchdog, reset , and wake up the ncv8508 is a precision micropower voltage regulator family. the part contains many of the required operational requirements for powering microprocessors. its' robustness makes it suitable for severe automotive environments. the devices low dropout voltage ensures operation of loads (i.e. microprocessors) when the battery voltage is low such as during the cranking cycle of an automobile. in addition to being a good fit for the automotive environment, the ncv8508 is ideal for use in battery operated, microprocessor controlled equipment because of it's extremely low quiescent current. features ? output voltage options: 3.3 v or 5.0 v ? 2.0% output voltage ? i out up to 250 ma ? micropower compatible control functions: wake up watchdog reset ? low dropout voltage: 250 mv @ 150 mv ? low quiescent current (100 m a typ) ? protection features: thermal shutdown short circuit 45 v operation ? internally fused leads in so16l package this document contains information on a new product. specifications and information herein are subject to change without notice. http://onsemi.com so16l dw suffix case 751g 1 16 so8 d suffix case 751 1 8 to220 seven lead t suffix case 821e 1 7 to220 seven lead tv suffix case 821j 1 d 2 pak 7pin d2t suffix case 936h 1 7 see general marking information in the device marking section on page 9 of this data sheet. device marking information see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information
ncv8508 series http://onsemi.com 2 pin connections reset v out 18 wake up sense wdi gnd v in delay v in v out 1 16 nc sense wdi nc gnd gnd gnd gnd wake up nc reset nc delay nc pin 1. v out 2. v in 3. wdi 4. gnd 5. wake up 6. reset 7. delay so16l so8 1 d 2 pak 7pin to220 seven lead 1 c1* v out gnd v in wdi ncv8508 1.0 m f i/o * . i/o reset reset 0.1 m f c2 microprocessor delay r delay 120 k v bat *c1 required if regulator is located far from power supply filter. v dd wake up figure 1. application circuit maximum ratings* rating value unit input voltage, v in 0.3 to 45 v output voltage, v out 0.3 to 18 v esd susceptibility (human body model) 2.0 kv logic inputs/outputs (reset, wdi, wakeup) 0.3 to +7.0 v operating junction temperature, t j 40 to150 c storage temperature range, t s 55 to +150 c lead temperature soldering: wave solder (through hole styles only) (note 1.) reflow: (smd styles only) (note 2.) 260 peak 230 peak c 1. 10 second maximum. 2. 60 second maximum above 183 c. *the maximum package power dissipation must be observed.
ncv8508 series http://onsemi.com 3 electrical characteristics (40 c t j 125 c; 6.0 v v in 28 v, 100 m a i out 150 ma, c 2 = 1.0 m f, r delay = 120 k; unless otherwise specified.) characteristic test conditions min typ max unit output selection output voltage, v out for 3.3 v option 3.234 3.300 3.366 v output voltage, v out for 5.0 v option 4.90 5.00 5.10 v dropout voltage (v in v out ) i out = 150 ma. note 3. 250 500 mv load regulation v in = 14 v, 5.0 ma < i out < 150 ma 5.0 30 mv line regulation i out = 5.0 ma 5.0 20 mv current limit 250 400 ma thermal shutdown guaranteed by design 150 180 210 c quiescent current v in = 12 v, i out = 250 ma 100 150 m a reset threshold for 3.3 v option 2.970 3.069 3.168 v threshold for 5.0 v option 4.50 4.65 4.80 v output low r load = 10 k to v out , v out 1.0 v 0.2 0.4 v output high r load = 10 k to gnd v out 0.2 v out 0.4 v delay time r delay = 60 k 3.0 1.5 5.0 2.5 7.0 3.5 ms watchdog input threshold high 70 %v out threshold low 30 %v out hysteresis 25 100 mv input current 0 < wdi < 6.0 v 10 0 +10 m a pulse width 50% wdi falling edge to 50% wdi rising edge and 50% wdi rising edge to 50% wdi falling edge, (see figure 5) 5.0 m s wake up output wake up period see figures 4 and 5. r delay = 60 k 32 16 40 20 48 24 ms ms wake up duty cycle nominal see figure 3. 45 50 55 % reset high to wake up rising delay time 50% reset rising edge to 50% wake up edge (see figures 3 and 4) r delay = 60 k 16 8 20 10 24 12 ms ms wake up response to watchdog input 50% wdi falling edge to 50% wake up falling edge 2.0 10 m s wake up response to reset 50% reset falling edge to 50% wake up falling edge. v out = 5.0 v 4.5 v 2.0 10 m s output low r load = 10 k 0.2 0.4 v output high r load = 10 k v out 0.2 v out 0.4 3. measured when the output voltage has dropped 100 mv from the nominal value
ncv8508 series http://onsemi.com 4 electrical characteristics (continued) (40 c t j 125 c; 6.0 v v in 28 v, 100 m a i out 150 ma, c 2 = 1.0 m f, r delay = 120 k; unless otherwise specified.) characteristic unit max typ min test conditions delay output voltage i delay = 50 m a. note 4. 1.25 v 4. current drain on the delay pin directly affects the delay time, wake up period, and the reset to wake up delay time.. package pin description package pin # to220 & d 2 pak so16l so8 pin symbol function 1 8 4 v out regulated output voltage 2.0%. 2 9 5 v in supply voltage to the ic. 3 11 6 wdi cmos compatible input lead. the watchdog func- tion monitors the falling edge of the incoming signal. 4 4, 5, 12, 13 2 gnd ground connection. 5 14 7 wake up cmos compatible output consisting of a continu- ously generated signal used to wake up the micro- processor from sleep mode. 6 15 8 reset cmos compatible output lead reset goes low whenever v out drops by more than 7.0% from nominal, or during the absence of a correct watch- dog signal. 7 16 1 delay buffered bandgap voltage used to create timing current for reset and wake up from r delay. 1, 2, 3, 6, 10 nc no connection. 7 3 sense kelvin connection which allows remote sensing of the output voltage for improved regulation. connect to v out if remote sensing is not required.
ncv8508 series http://onsemi.com 5 - + + - wake up circuit timing circuit falling edge detect watchdog circuit thermal shutdown current limit charge pump bandgap reference v in reset v out wake up wdi delay figure 2. block diagram
ncv8508 series http://onsemi.com 6 timing diagrams watchdog pulse width v in reset wake up wdi v out wake up duty cycle = 50% power up sleep mode normal operation with varying watchdog signal reset high to wake up delay time por figure 3. power up, sleep mode and normal operation figure 4. error condition: watchdog remains low and a reset is issued v in reset wake up wdi v out por reset high to wake up delay time reset delay time reset high to wake up delay time wake up period por reset wake up wdi v out watchdog pulse width reset threshold por power down wake up period figure 5. power down and restart sequence
ncv8508 series http://onsemi.com 7 definition of terms dropout voltage: the inputoutput voltage differential at which the circuit ceases to regulate against further reduction in input voltage. measured when the output voltage has dropped 100 mv from the nominal value obtained at 14 v input, dropout voltage is dependent upon load current and junction temperature. input voltage: the dc voltage applied to the input terminals with respect to ground. line regulation: the change in output voltage for a change in the input voltage. the measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected. load regulation: the change in output voltage for a change in load current at constant chip temperature. quiescent curr ent: the part of the positive input current that does not contribute to the positive load current. the regulator ground lead current. ripple rejection: the ratio of the peaktopeak input ripple voltage to the peaktopeak output ripple voltage. current limit: peak current that can be delivered to the output. detailed operating description the ncv8508 is a precision micropower voltage regulator with very low quiescent current (100 m a typical at 250 ma load). a typical dropout voltage is 250 mv at 150 ma. microprocessor control logic includes watchdog, wake up and reset . this unique combination of extremely low quiescent current and full microprocessor control makes the ncv8508 ideal for use in battery operated, microprocessor controlled equipment in addition to being a good fit in the automotive environment. the ncv8508 wake up function brings the microprocessor out of sleep mode. the microprocessor in turn, signals its wake up status back to the ncv8508 by issuing a watchdog signal. the watchdog logic function monitors an input signal (wdi) from the microprocessor. the ncv8508 responds to the falling edge of the watchdog signal which it expects at least once during each wakeup period. when the correct watchdog signal is received, a falling edge is issued on the wakeup signal line. reset is independent of v in and operates correctly to an output voltage as low as 1.0 v. a signal is issued in any of three situations. during power up the reset is held low until the output voltage is in regulation. during operation if the output voltage shifts below the regulation limits, the reset toggles low and remains low until proper output voltage regulation is restored. and finally, a reset signal is issued if the regulator does not receive a watchdog signal within the wake up period. the reset pulse width, wake up signal frequency, and wake up delay time are all set by one external resistor, r delay . the delay pin is a buffered bandgap voltage (1.25 v). it can be used as a reference for an external tracking regulator like the cs8182. the regulator is protected against short circuit and thermal runaway conditions. the device runs through 45 volt transients, making it suitable for use in automotive environments. circuit description functional description to reduce the drain on the battery a system can go into a low current consumption mode when ever its not performing a main routine. the wake up signal is generated continuously and is used to interrupt a microcontroller that is in sleep mode. the nominal output is a 5.0 volt square wave with a duty cycle of 50% at a frequency that is determined by a timing resistor, r delay . when the microprocessor receives a rising edge from the wake up output, it must issue a watchdog pulse and check its inputs to decide if it should resume normal operations or remain in the sleep mode. the first falling edge of the watchdog signal causes the wake up to go low within 2.0 m s (typ) and remain low until the next wake up cycle (see figure 6). other watchdog pulses received within the same cycle are ignored (figure 3). figure 6. wake up response to wdi wake up wdi wake up response to wdi
ncv8508 series http://onsemi.com 8 figure 7. wake up response to reset (low voltage) wake up response to reset reset wake up during power up, reset is held low until the output voltage is in regulation. during operation, if the output voltage shifts below the regulation limits, the reset toggles low and remains low until proper output voltage regulation is restored. after the reset delay, reset returns high. the watchdog circuitry continuously monitors the input watchdog signal (wdi) from the microprocessor. the absence of a falling edge on the watchdog input during one wake up cycle will cause a reset pulse to occur at the end of the wake up cycle. (see figure 4). the wake up output is pulled low during a reset regardless of the cause of the reset . after the reset returns high, the wake up cycle begins again (see figure 4). the reset delay time, wake up signal frequency and reset high to wake up delay time are all set by one external resistor r delay . wake up period = (3.33 10 7 )r delay reset delay time = (4.17 10 8 )r delay reset high to wake up delay time = (1.67 10 7 )r delay capacitor temperature coefficient and tolerance as well as the tolerance of the ncv8508 must be taken into account in order to get the correct system tolerance for each parameter. application notes calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 8) is: p d ( max ) { v in ( max ) v out ( min ) } v in ( max ) i q (1) where: v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i out(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i out(max) . smart regulator ? i q control features i out i in figure 8. single output regulator with key performance parameters labeled v in v out } once the value of p d(max) is known, the maximum permissible value of r q ja can be calculated: r ja 150 c t a p d (2) the value of r q ja can then be compared with those in the package section of the data sheet. those packages with r q ja 's less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heatsink will be required. heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r q ja : r ja r jc r cs r sa (3) where: r q jc = the junctiontocase thermal resistance, r q cs = the casetoheatsink thermal resistance, and r q sa = the heatsinktoambient thermal resistance. r q jc appears in the package section of the data sheet. like r q ja , it too is a function of package type. r q cs and r q sa are functions of the package type, heatsink and the interface between them. these values appear in heat sink data sheets of heat sink manufacturers.
ncv8508 series http://onsemi.com 9 ordering information device output voltage package shipping ncv8508t33 to220 straight, 7pin 50 units/rail ncv8508tv33 to220 vertical, 7pin 50 units/rail ncv8508d2t33 d 2 pak, 7pin 50 units/rail ncv8508d2t33r4 33v d 2 pak, 7pin 750 tape & reel ncv8508d33 3.3 v so8 95 units/rail ncv8508d33r2 so8 2500 tape & reel ncv8508dw33 so16l 46 units/rail NCV8508DW33R2 so16l 1000 tape & reel ncv8508t50 to220 straight, 7pin 50 units/rail ncv8508tv50 to220 vertical, 7pin 50 units/rail ncv8508d2t50 d 2 pak, 7pin 50 units/rail ncv8508d2t50r4 50v d 2 pak, 7pin 750 tape & reel ncv8508d50 5.0 v so8 95 units/rail ncv8508d50r2 so8 2500 tape & reel ncv8508dw50 so16l 46 units/rail ncv8508dw50r2 so16l 1000 tape & reel marking diagrams 1 8508x alyw 8 so8 d suffix case 751 so16l dw suffix case 751g 1 ncv8508x awlyyww 16 d 2 pak 7pin d2t suffix case 936h ncv8508x awlyww 1 to220 seven lead t suffix case 821e ncv8508x awlyww 1 to220 seven lead tv suffix case 821j ncv8508x awlyww 1 x = voltage ratings as indicated below: 3 = 3.3 v 5 = 5.0 v a = assembly location wl, l = wafer lot yy, y = year ww, w = work week
ncv8508 series http://onsemi.com 10 package dimensions to220 seven lead t suffix case 821e04 issue c to220 seven lead tv suffix case 821j02 issue a dim a min max min max millimeters 0.600 0.610 15.24 15.49 inches b 0.386 0.403 9.80 10.23 c 0.170 0.180 4.32 4.56 d 0.028 0.037 0.71 0.94 g 0.045 0.055 1.15 1.39 h j 0.018 0.026 0.46 0.66 k 1.028 1.042 26.11 26.47 l 0.355 0.365 9.02 9.27 m 5 nom q 0.142 0.148 3.61 3.75 u 0.490 0.501 12.45 12.72 v 0.045 0.055 1.15 1.39 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension d does not include dambar protrusion. allowable protrusion shall be 0.003 (0.076) total in excess of the d dimension at maximum material condition. 5 nom 0.088 0.102 2.24 2.59 a k u l q d g b c m m v m j h seating plane optional chamfer m notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension d does not include interconnect bar (dambar) protrusion. dimension d including protrusion shall not exceed 10.92 (0.043) maximum. a u d g b t m 0.356 (0.014) m q 7 pl q k f j c e t n l m w dim min max min max millimeters inches a 0.560 0.590 14.22 14.99 b 0.385 0.415 9.77 10.54 c 0.160 0.190 4.06 4.82 d 0.023 0.037 0.58 0.94 e 0.045 0.055 1.14 1.40 f 0.540 0.555 13.72 14.10 g 0.050 bsc 1.27 bsc j 0.014 0.022 0.36 0.56 k 0.785 0.800 19.94 20.32 l 0.322 0.337 8.18 8.56 m 0.073 0.088 1.85 2.24 n 0.090 0.115 2.28 2.91 q 0.146 0.156 3.70 3.95 s 0.164 0.179 4.17 4.55 u 0.460 0.475 11.68 12.07 w 33 r s h h 14.48 15.11 0.570 0.595 r 0.289 0.304 7.34 7.72
ncv8508 series http://onsemi.com 11 d 2 pak 7pin d2t suffix case 936h01 issue o so8 d suffix case 75107 issue w t dim min max min max millimeters inches a 0.326 0.336 8.28 8.53 b 0.396 0.406 10.05 10.31 c 0.170 0.180 4.31 4.57 d 0.026 0.036 0.66 0.91 e 0.045 0.055 1.14 1.40 f 0.058 0.078 1.41 1.98 g 0.050 bsc 1.27 bsc h 0.100 0.110 2.54 2.79 j 0.018 0.025 0.46 0.64 k 0.204 0.214 5.18 5.44 m 0.055 0.066 1.40 1.68 n 0.000 0.004 0.00 0.10 notes: 1. dimensions and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. tab contour optional within dimensions b and m. 4. dimensions a and b do not include mold flash or gate protrusions. mold flash and gate protrusions not to exceed 0.025 (0.635) max. b n a k m e c seating plane f h j d 7 pl g t m 0.13 (0.005) m b 12345 u 0.256 ref 6.50 ref v 0.305 ref 7.75 ref 67 8 u v seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m
ncv8508 series http://onsemi.com 12 so16l dw suffix case 751g03 issue b d 14x b 16x seating plane s a m 0.25 b s t 16 9 8 1 h x 45 m b m 0.25 h 8x e b a e t a1 a l c notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not inlcude mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.13 total in excess of the b dimension at maximum material condition. dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 10.15 10.45 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 package thermal data parameter to220 7 lead d 2 pak 7pin so8 so16l unit r q jc typical 1.8 1.8 45 18 c/w r q ja typical 50 1050* 165 75 c/w *depending on thermal properties of substrate. r q ja = r q jc + r q ca . on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. ncv8508/d smart regulator is a registered trademark of semiconductor components industries, llc. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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